{"product_id":"analog-integrated-circuit-design-isbn-9780470770108","title":"Analog Integrated Circuit Design","description":"When first published in 1996, this text by David Johns and Kenneth Martin quickly became a leading textbook for the advanced course on Analog IC Design. This new edition has been thoroughly revised and updated by Tony Chan Carusone, a University of Toronto colleague of Drs. Johns and Martin.  Dr. Chan Carusone is a specialist in analog and digital IC design in communications and signal processing. This edition features extensive new material on CMOS IC device modeling, processing and layout.  Coverage has been added on several types of circuits that have increased in importance in the past decade, such as generalized integer-N phase locked loops and their phase noise analysis, voltage regulators, and 1.5b-per-stage pipelined A\/D converters.  Two new chapters have been added to make the book more accessible to beginners in the field: frequency response of analog ICs; and basic theory of feedback amplifiers.  \u003cb\u003eCHAPTER 1 INTEGRATED-CIRCUIT DEVICES AND MODELLING 1\u003c\/b\u003e \u003cp\u003e1.1 Semiconductors and pn Junctions 1\u003c\/p\u003e \u003cp\u003e1.2 MOS Transistors 14\u003c\/p\u003e \u003cp\u003e1.3 Device Model Summary 38\u003c\/p\u003e \u003cp\u003e1.4 Advanced MOS Modelling 42\u003c\/p\u003e \u003cp\u003e1.5 SPICE Modelling Parameters 50\u003c\/p\u003e \u003cp\u003e1.6 Passive Devices 54\u003c\/p\u003e \u003cp\u003e1.7 Appendix 60\u003c\/p\u003e \u003cp\u003e1.8 Key Points 68\u003c\/p\u003e \u003cp\u003e1.9 References 69\u003c\/p\u003e \u003cp\u003e1.10 Problems 69\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 2 PROCESSING AND LAYOUT 73\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 CMOS Processing 73\u003c\/p\u003e \u003cp\u003e2.2 CMOS Layout and Design Rules 86\u003c\/p\u003e \u003cp\u003e2.3 Variability and Mismatch 96\u003c\/p\u003e \u003cp\u003e2.4 Analog Layout Considerations 103\u003c\/p\u003e \u003cp\u003e2.5 Key Points 113\u003c\/p\u003e \u003cp\u003e2.6 References 114\u003c\/p\u003e \u003cp\u003e2.7 Problems 114\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 3 BASIC CURRENT MIRRORS AND SINGLE-STAGE AMPLIFIERS 117\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Simple CMOS Current Mirror 118\u003c\/p\u003e \u003cp\u003e3.2 Common-Source Amplifier 120\u003c\/p\u003e \u003cp\u003e3.3 Source-Follower or Common-Drain Amplifier 122\u003c\/p\u003e \u003cp\u003e3.4 Common-Gate Amplifier 124\u003c\/p\u003e \u003cp\u003e3.5 Source-Degenerated Current Mirrors 127\u003c\/p\u003e \u003cp\u003e3.6 Cascode Current Mirrors 129\u003c\/p\u003e \u003cp\u003e3.7 Cascode Gain Stage 131\u003c\/p\u003e \u003cp\u003e3.8 MOS Differential Pair and Gain Stage 135\u003c\/p\u003e \u003cp\u003e3.9 Key Points 138\u003c\/p\u003e \u003cp\u003e3.10 References 139\u003c\/p\u003e \u003cp\u003e3.11 Problems 139\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 4 FREQUENCY RESPONSE OF ELECTRONIC CIRCUITS 144\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Frequency Response of Linear Systems 144\u003c\/p\u003e \u003cp\u003e4.2 Frequency Response of Elementary Transistor Circuits 165\u003c\/p\u003e \u003cp\u003e4.3 Cascode Gain Stage 181\u003c\/p\u003e \u003cp\u003e4.4 Source-Follower Amplifier 187\u003c\/p\u003e \u003cp\u003e4.5 Differential Pair 193\u003c\/p\u003e \u003cp\u003e4.6 Key Points 197\u003c\/p\u003e \u003cp\u003e4.7 References 198\u003c\/p\u003e \u003cp\u003e4.8 Problems 199\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 5 FEEDBACK AMPLIFIERS 204\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Ideal Model of Negative Feedback 204\u003c\/p\u003e \u003cp\u003e5.2 Dynamic Response of Feedback Amplifiers 208\u003c\/p\u003e \u003cp\u003e5.3 First- and Second-Order Feedback Systems 213\u003c\/p\u003e \u003cp\u003e5.4 Common Feedback Amplifiers 220\u003c\/p\u003e \u003cp\u003e5.5 Summary of Key Points 235\u003c\/p\u003e \u003cp\u003e5.6 References 235\u003c\/p\u003e \u003cp\u003e5.7 Problems 236\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 6 BASIC OPAMP DESIGN AND COMPENSATION 242\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 Two-Stage CMOS Opamp 242\u003c\/p\u003e \u003cp\u003e6.2 Opamp Compensation 254\u003c\/p\u003e \u003cp\u003e6.3 Advanced Current Mirrors 261\u003c\/p\u003e \u003cp\u003e6.4 Folded-Cascode Opamp 268\u003c\/p\u003e \u003cp\u003e6.5 Current Mirror Opamp 275\u003c\/p\u003e \u003cp\u003e6.6 Linear Settling Time Revisited 279\u003c\/p\u003e \u003cp\u003e6.7 Fully Differential Opamps 281\u003c\/p\u003e \u003cp\u003e6.8 Common-Mode Feedback Circuits 288\u003c\/p\u003e \u003cp\u003e6.9 Summary of Key Points 292\u003c\/p\u003e \u003cp\u003e6.10 References 293\u003c\/p\u003e \u003cp\u003e6.11 Problems 294\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 7 BIASING, REFERENCES, AND REGULATORS 302\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Analog Integrated Circuit Biasing 302\u003c\/p\u003e \u003cp\u003e7.2 Establishing Constant Transconductance 307\u003c\/p\u003e \u003cp\u003e7.3 Establishing Constant Voltages and Currents 310\u003c\/p\u003e \u003cp\u003e7.4 Voltage Regulation 321\u003c\/p\u003e \u003cp\u003e7.5 Summary of Key Points 327\u003c\/p\u003e \u003cp\u003e7.6 References 327\u003c\/p\u003e \u003cp\u003e7.7 Problems 328\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 8 BIPOLAR DEVICES AND CIRCUITS 331\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e8.1 Bipolar-Junction Transistors 331\u003c\/p\u003e \u003cp\u003e8.2 Bipolar Device Model Summary 344\u003c\/p\u003e \u003cp\u003e8.3 SPICE Modeling 345\u003c\/p\u003e \u003cp\u003e8.4 Bipolar and BICMOS Processing 346\u003c\/p\u003e \u003cp\u003e8.5 Bipolar Current Mirrors and Gain Stages 349\u003c\/p\u003e \u003cp\u003e8.6 Appendix 356\u003c\/p\u003e \u003cp\u003e8.7 Summary of Key Points 359\u003c\/p\u003e \u003cp\u003e8.8 References 360\u003c\/p\u003e \u003cp\u003e8.9 Problems 360\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 9 NOISE AND LINEARITY ANALYSIS AND MODELLING 363\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e9.1 Time-Domain Analysis 363\u003c\/p\u003e \u003cp\u003e9.2 Frequency-Domain Analysis 367\u003c\/p\u003e \u003cp\u003e9.3 Noise Models for Circuit Elements 377\u003c\/p\u003e \u003cp\u003e9.4 Noise Analysis Examples 387\u003c\/p\u003e \u003cp\u003e9.5 Dynamic Range Performance 397\u003c\/p\u003e \u003cp\u003e9.6 Key Points 405\u003c\/p\u003e \u003cp\u003e9.7 References 406\u003c\/p\u003e \u003cp\u003e9.8 Problems 406\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 10 COMPARATORS 413\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e10.1 Comparator Specifications 413\u003c\/p\u003e \u003cp\u003e10.2 Using an Opamp for a Comparator 415\u003c\/p\u003e \u003cp\u003e10.3 Charge-Injection Errors 418\u003c\/p\u003e \u003cp\u003e10.4 Latched Comparators 426\u003c\/p\u003e \u003cp\u003e10.5 Examples of CMOS and BiCMOS Comparators 431\u003c\/p\u003e \u003cp\u003e10.6 Examples of Bipolar Comparators 437\u003c\/p\u003e \u003cp\u003e10.7 Key Points 439\u003c\/p\u003e \u003cp\u003e10.8 References 440\u003c\/p\u003e \u003cp\u003e10.9 Problems 440\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 11 SAMPLE-AND-HOLD AND TRANSLINEAR CIRCUITS 444\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e11.1 Performance of Sample-and-Hold Circuits 444\u003c\/p\u003e \u003cp\u003e11.2 MOS Sample-and-Hold Basics 446\u003c\/p\u003e \u003cp\u003e11.3 Examples of CMOS S\/H Circuits 452\u003c\/p\u003e \u003cp\u003e11.4 Bipolar and BiCMOS Sample-and-Holds 456\u003c\/p\u003e \u003cp\u003e11.5 Translinear Gain Cell 460\u003c\/p\u003e \u003cp\u003e11.6 Translinear Multiplier 462\u003c\/p\u003e \u003cp\u003e11.7 Key Points 464\u003c\/p\u003e \u003cp\u003e11.8 References 465\u003c\/p\u003e \u003cp\u003e11.9 Problems 466\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 12 CONTINUOUS-TIME FILTERS 469\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e12.1 Introduction to Continuous-Time Filters 469\u003c\/p\u003e \u003cp\u003e12.2 Introduction to Gm-C Filters 471\u003c\/p\u003e \u003cp\u003e12.3 Transconductors Using Fixed Resistors 479\u003c\/p\u003e \u003cp\u003e12.4 CMOS Transconductors Using Triode Transistors 484\u003c\/p\u003e \u003cp\u003e12.5 CMOS Transconductors Using Active Transistors 493\u003c\/p\u003e \u003cp\u003e12.6 Bipolar Transconductors 500\u003c\/p\u003e \u003cp\u003e12.7 BiCMOS Transconductors 506\u003c\/p\u003e \u003cp\u003e12.8 Active RC and MOSFET-C Filters 509\u003c\/p\u003e \u003cp\u003e12.9 Tuning Circuitry 516\u003c\/p\u003e \u003cp\u003e12.10 Introduction to Complex Filters 525\u003c\/p\u003e \u003cp\u003e12.11 Key Points 531\u003c\/p\u003e \u003cp\u003e12.12 References 532\u003c\/p\u003e \u003cp\u003e12.13 Problems 534\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 13 DISCRETE-TIME SIGNALS 537\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e13.1 Overview of Some Signal Spectra 537\u003c\/p\u003e \u003cp\u003e13.2 Laplace Transforms of Discrete-Time Signals 537\u003c\/p\u003e \u003cp\u003e13.3 z-Transform 541\u003c\/p\u003e \u003cp\u003e13.4 Downsampling and Upsampling 543\u003c\/p\u003e \u003cp\u003e13.5 Discrete-Time Filters 545\u003c\/p\u003e \u003cp\u003e13.6 Sample-and-Hold Response 552\u003c\/p\u003e \u003cp\u003e13.7 Key Points 554\u003c\/p\u003e \u003cp\u003e13.8 References 555\u003c\/p\u003e \u003cp\u003e13.9 Problems 555\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 14 SWITCHED-CAPACITOR CIRCUITS 557\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e14.1 Basic Building Blocks 557\u003c\/p\u003e \u003cp\u003e14.2 Basic Operation and Analysis 560\u003c\/p\u003e \u003cp\u003e14.3 Noise in Switched-Capacitor Circuits 570\u003c\/p\u003e \u003cp\u003e14.4 First-Order Filters 572\u003c\/p\u003e \u003cp\u003e14.5 Biquad Filters 577\u003c\/p\u003e \u003cp\u003e14.6 Charge Injection 585\u003c\/p\u003e \u003cp\u003e14.7 Switched-Capacitor Gain Circuits 588\u003c\/p\u003e \u003cp\u003e14.8 Correlated Double-Sampling Techniques 593\u003c\/p\u003e \u003cp\u003e14.9 Other Switched-Capacitor Circuits 594\u003c\/p\u003e \u003cp\u003e14.10 Key Points 600\u003c\/p\u003e \u003cp\u003e14.11 References 601\u003c\/p\u003e \u003cp\u003e14.12 Problems 602\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 15 DATA CONVERTER FUNDAMENTALS 606\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e15.1 Ideal D\/A Converter 606\u003c\/p\u003e \u003cp\u003e15.2 Ideal A\/D Converter 608\u003c\/p\u003e \u003cp\u003e15.3 Quantization Noise 609\u003c\/p\u003e \u003cp\u003e15.4 Signed Codes 612\u003c\/p\u003e \u003cp\u003e15.5 Performance Limitations 614\u003c\/p\u003e \u003cp\u003e15.6 Key Points 620\u003c\/p\u003e \u003cp\u003e15.7 References 620\u003c\/p\u003e \u003cp\u003e15.8 Problems 620\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 16 NYQUIST-RATE D\/A CONVERTERS 623\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e16.1 Decoder-Based Converters 623\u003c\/p\u003e \u003cp\u003e16.2 Binary-Scaled Converters 628\u003c\/p\u003e \u003cp\u003e16.3 Thermometer-Code Converters 634\u003c\/p\u003e \u003cp\u003e16.4 Hybrid Converters 640\u003c\/p\u003e \u003cp\u003e16.5 Key Points 642\u003c\/p\u003e \u003cp\u003e16.6 References 643\u003c\/p\u003e \u003cp\u003e16.7 Problems 643\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 17 NYQUIST-RATE A\/D CONVERTERS 646\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e17.1 Integrating Converters 646\u003c\/p\u003e \u003cp\u003e17.2 Successive-Approximation Converters 650\u003c\/p\u003e \u003cp\u003e17.3 Algorithmic (or Cyclic) A\/D Converter 662\u003c\/p\u003e \u003cp\u003e17.4 Pipelined A\/D Converters 665\u003c\/p\u003e \u003cp\u003e17.5 Flash Converters 673\u003c\/p\u003e \u003cp\u003e17.6 Two-Step A\/D Converters 677\u003c\/p\u003e \u003cp\u003e17.7 Interpolating A\/D Converters 680\u003c\/p\u003e \u003cp\u003e17.8 Folding A\/D Converters 683\u003c\/p\u003e \u003cp\u003e17.9 Time-Interleaved A\/D Converters 687\u003c\/p\u003e \u003cp\u003e17.10 Key Points 690\u003c\/p\u003e \u003cp\u003e17.11 References 691\u003c\/p\u003e \u003cp\u003e17.12 Problems 692\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 18 OVERSAMPLING CONVERTERS 696\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e18.1 Oversampling without Noise Shaping 696\u003c\/p\u003e \u003cp\u003e18.2 Oversampling with Noise Shaping 702\u003c\/p\u003e \u003cp\u003e18.3 System Architectures 711\u003c\/p\u003e \u003cp\u003e18.4 Digital Decimation Filters 714\u003c\/p\u003e \u003cp\u003e18.5 Higher-Order Modulators 718\u003c\/p\u003e \u003cp\u003e18.6 Bandpass Oversampling Converters 721\u003c\/p\u003e \u003cp\u003e18.7 Practical Considerations 722\u003c\/p\u003e \u003cp\u003e18.8 Multi-Bit Oversampling Converters 727\u003c\/p\u003e \u003cp\u003e18.9 Third-Order A\/D Design Example 730\u003c\/p\u003e \u003cp\u003e18.10 Key Points 732\u003c\/p\u003e \u003cp\u003e18.11 References 734\u003c\/p\u003e \u003cp\u003e18.12 Problems 735\u003c\/p\u003e \u003cp\u003e\u003cb\u003eCHAPTER 19 PHASE-LOCKED LOOPS 738\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e19.1 Basic Phase-Locked Loop Architecture 738\u003c\/p\u003e \u003cp\u003e19.2 Linearized Small-Signal Analysis 748\u003c\/p\u003e \u003cp\u003e19.3 Jitter and Phase Noise 756\u003c\/p\u003e \u003cp\u003e19.4 Electronic Oscillators 765\u003c\/p\u003e \u003cp\u003e19.5 Jitter and Phase Noise in PLLS 777\u003c\/p\u003e \u003cp\u003e19.6 Key Points 781\u003c\/p\u003e \u003cp\u003e19.7 References 782\u003c\/p\u003e \u003cp\u003e19.8 Problems 782\u003c\/p\u003e \u003cp\u003e\u003cb\u003eINDEX 787\u003c\/b\u003e\u003c\/p\u003e  \u003cp\u003e\u003cstrong\u003eTony Chan Carusone\u003c\/strong\u003e completed the B.A.Sc. and Ph.D. degrees at the University of Toronto in 1997 and 2002 respectvely, during which tme he received the Governor-General's Silver Medal. Since 2001, he has been with the Department of Electrical and Computer Engineering at the University of Toronto where he is currently an Associate Professor. From 2002 to 2007 he held the Canada Research Chair in Integrated Systems and in 2008 was a visitng researcher at the University of Pavia. He is also an occasional consultant to industry, having worked for Snowbush Inc., Gennum Corp., and Intel Corp., all in the area of high-speed links. Tony was a co-author of the best student papers at both the 2007 and 2008 Custom Integrated Circuits Conference and the best paper at the 2005 Compound Semiconductor Integrated Circuits Symposium. He is an appointed member of the Administratve Commitee of the IEEE Solid-State Circuits Society, a member and past chair of the Analog Signal Processing Technical Commitee for the IEEE Circuits and Systems Society, and a past member and chair of the Wireline Communicatons subcommitee of the Custom Integrated Circuits Conference. He has served as a guest editor for both the \u003cem\u003eIEEE Journal of Solid-State Circuits\u003c\/em\u003e and the \u003cem\u003eIEEE Transactons on Circuits and Systems I: Regular Papers\u003c\/em\u003e, and served on the editorial board of the \u003cem\u003eIEEE Transactons on Circuits and Systems II: Express Briefs\u003c\/em\u003e from 2006 untl 2009 when he was Editor-in-Chief.   \u003c\/p\u003e\u003cp\u003e\u003cb\u003eThe Wait is Over—The Leading Analog IC Design Text Returns!\u003c\/b\u003e \u003c\/p\u003e\u003cp\u003eWhen first published in 1996, this text by David Johns and Kenneth Martin quickly became a leading textbook for the advanced course on Analog IC Design. This new edition has been thoroughly revised and updated by Tony Chan Carusone, a University of Toronto colleague of Drs. Johns and Martin. Dr. Chan Carusone is a specialist in analog and digital IC design in communications and signal processing. \u003c\/p\u003e\u003cp\u003e\u003cb\u003eNew Features\u003c\/b\u003e \u003c\/p\u003e\u003cul\u003e \u003cli\u003eNew chapters on frequency response and feedback analysis make the text accessible to new analog circuit designers\u003c\/li\u003e \u003cli\u003eUpdated examples and problems with modern process technologies\u003c\/li\u003e \u003cli\u003eLow voltage design topics including:\u003c\/li\u003e \u003cul\u003e \u003cli\u003eSubthreshold MOS operation\u003c\/li\u003e \u003cli\u003eLow-voltage opamp design\u003c\/li\u003e \u003cli\u003eLow-voltage bandgap reference\u003c\/li\u003e \u003c\/ul\u003e \u003cli\u003eNew topics support the teaching of design in deep submicron CMOS technologies including:\u003c\/li\u003e \u003cul\u003e \u003cli\u003eMOS parameter extraction\u003c\/li\u003e \u003cli\u003eMismatch \u0026amp; variability\u003c\/li\u003e \u003cli\u003eProximity effects\u003c\/li\u003e \u003c\/ul\u003e  \u003cli\u003eReorganization \u0026amp; consolidation of CMOS and bipolar material to facilitate teaching of either or both\u003c\/li\u003e \u003cli\u003eLinear voltage regulators\u003c\/li\u003e \u003cli\u003eNoise in sampled circuits\u003c\/li\u003e \u003cli\u003e1.5-bit per stage pipelined converter and other new A\/D converter architectures\u003c\/li\u003e \u003cli\u003eComplex signal processing\u003c\/li\u003e \u003cli\u003eAll-new modern coverage of phase locked loops including phase noise and jitter analysis\u003c\/li\u003e \u003cli\u003eKey points are highlighted and summarized for each chapter\u003c\/li\u003e \u003cli\u003eOnline SPICE models and examples at the companion website: analogicdesign.com\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cb\u003eHallmark Features\u003c\/b\u003e \u003c\/p\u003e\u003cul\u003e \u003cli\u003eIntuitive approach\u003c\/li\u003e \u003cli\u003eEmphasis on practical design and analysis techniques\u003c\/li\u003e \u003cli\u003eThorough treatment of data converters, both Nyquist-rate and oversampled\u003c\/li\u003e \u003cli\u003ePractical error correction, tuning, and calibration techniques\u003c\/li\u003e \u003cli\u003eA reference for both students and practicing analog designers alike\u003c\/li\u003e \u003c\/ul\u003e","brand":"Wiley","offers":[{"title":"Default Title","offer_id":47988732395749,"sku":"NP9780470770108","price":194.0,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1842\/7735\/files\/9780470770108.jpg?v=1761781372","url":"https:\/\/k12savings.com\/products\/analog-integrated-circuit-design-isbn-9780470770108","provider":"K12savings","version":"1.0","type":"link"}