{"product_id":"practical-microcontroller-engineering-with-arm-technology-isbn-9781119052371","title":"Practical Microcontroller Engineering with ARM­ Technology","description":"The first microcontroller textbook to provide complete and systemic introductions to all components and materials related to the ARM® Cortex®-M4 microcontroller system, including hardware and software as well as practical applications with real examples.\u003cbr\u003e\u003cbr\u003eThis book covers both the fundamentals, as well as practical techniques in designing and building microcontrollers in industrial and commercial applications.\u003cbr\u003e\u003cbr\u003e \u003cul\u003e \u003cli\u003eExamples included in this book have been compiled, built, and tested\u003c\/li\u003e \u003cli\u003eIncludes Both ARM® assembly and C codes\u003c\/li\u003e \u003cli\u003eDirect Register Access (DRA) model and the Software Driver (SD) model programming techniques and discussed\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003eIf you are an instructor and adopted this book for your course, please email \u003ca href=\"mailto:ieeeproposals@wiley.com\"\u003eieeeproposals@wiley.com\u003c\/a\u003e to get access to the instructor files for this book.\u003c\/p\u003e \u003cp\u003ePreface xxix\u003c\/p\u003e \u003cp\u003eAcknowledgments xxxi\u003c\/p\u003e \u003cp\u003eTrademarks and Copyrights xxxiii\u003c\/p\u003e \u003cp\u003eCopyright Permissions xxxv\u003c\/p\u003e \u003cp\u003eAbout the Companion Website xxxix\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 1 Introduction to Microcontrollers and This Book 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 Microcontroller Configuration and Structure 2\u003c\/p\u003e \u003cp\u003e1.2 The ARM\u003csup\u003e® \u003c\/sup\u003eCortex\u003csup\u003e®\u003c\/sup\u003eM4 Microcontroller System 3\u003c\/p\u003e \u003cp\u003e1.3 The TM4C123GH6PM Microcontroller Development Tools and Kits 4\u003c\/p\u003e \u003cp\u003e1.4 Outstanding Features About This Book 5\u003c\/p\u003e \u003cp\u003e1.5 Who This Book Is For 5\u003c\/p\u003e \u003cp\u003e1.6 What This Book Covers 6\u003c\/p\u003e \u003cp\u003e1.7 How This Book Is Organized and How to Use This Book 8\u003c\/p\u003e \u003cp\u003e1.8 How to Use the Source Code and Sample Projects 9\u003c\/p\u003e \u003cp\u003e1.9 Instructors and Customers Supports 11\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 2 ARM\u003csup\u003e®\u003c\/sup\u003e Microcontroller Architectures 13\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 Overview and Introduction 13\u003c\/p\u003e \u003cp\u003e2.2 Introduction to ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 MCU 15\u003c\/p\u003e \u003cp\u003e2.2.1 The Architecture of ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 MCU 17\u003c\/p\u003e \u003cp\u003e2.3 The Memory Architecture 27\u003c\/p\u003e \u003cp\u003e2.3.1 The Memory Map 28\u003c\/p\u003e \u003cp\u003e2.3.2 The Stack Memory 29\u003c\/p\u003e \u003cp\u003e2.3.3 The Program Models and States 32\u003c\/p\u003e \u003cp\u003e2.3.4 The Memory Protection Unit (MPU) 33\u003c\/p\u003e \u003cp\u003e2.4 The Nested Vectored Interrupt Controller (NVIC) Architecture 34\u003c\/p\u003e \u003cp\u003e2.4.1 The Nested Vectored Interrupt Controller (NVIC) Features 35\u003c\/p\u003e \u003cp\u003e2.4.2 Exception and Interrupt Sources 35\u003c\/p\u003e \u003cp\u003e2.4.3 Exception Priority Levels and Mask Registers 35\u003c\/p\u003e \u003cp\u003e2.4.4 Respond and Process Exceptions and Interrupts 36\u003c\/p\u003e \u003cp\u003e2.4.5 Exception and Interrupt Vector Table 37\u003c\/p\u003e \u003cp\u003e2.5 The Debug Architecture 37\u003c\/p\u003e \u003cp\u003e2.6 Introduction to Tiva\u003csup\u003eTM \u003c\/sup\u003eC Series ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 MCU-TM4C123GH6PM 38\u003c\/p\u003e \u003cp\u003e2.6.1 TM4C123GH6PM Microcontroller Overview 39\u003c\/p\u003e \u003cp\u003e2.6.2 TM4C123GH6PM Microcontroller On-Chip Memory Map 40\u003c\/p\u003e \u003cp\u003e2.6.3 TM4C123GH6PM Microcontroller General-Purpose Input–Output (GPIO) Module 44 \u003c\/p\u003e \u003cp\u003e2.6.4 TM4C123GH6PM Microcontroller System Controls 57\u003c\/p\u003e \u003cp\u003e2.7 Introduction to Tiva\u003csup\u003eTM \u003c\/sup\u003eC Series LaunchPad\u003csup\u003eTM \u003c\/sup\u003eTM4C123GXL Evaluation Board 72\u003c\/p\u003e \u003cp\u003e2.8 Introduction to EduBASE ARM\u003csup\u003e®\u003c\/sup\u003e Trainer 77\u003c\/p\u003e \u003cp\u003e2.9 Chapter Summary 77\u003c\/p\u003e \u003cp\u003eHomework 79\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 3 ARM\u003csup\u003e®\u003c\/sup\u003e Microcontroller Development Kits 83\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Overview and Introduction 83\u003c\/p\u003e \u003cp\u003e3.2 The Entire Tiva\u003csup\u003eTM \u003c\/sup\u003eTM4C123G-based Development System 84\u003c\/p\u003e \u003cp\u003e3.3 Download and Install Development Suite and Specified Firmware 86\u003c\/p\u003e \u003cp\u003e3.4 Introduction to the Integrated Development Environment—Keil\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003eMDK μVersion5 87\u003c\/p\u003e \u003cp\u003e3.4.1 The Keil\u003csup\u003e®\u003c\/sup\u003e MDK-ARM\u003csup\u003e®\u003c\/sup\u003e for the MDK-Cortex-M Family 88\u003c\/p\u003e \u003cp\u003e3.4.2 General Development Flow with MDK-ARM\u003csup\u003e®\u003c\/sup\u003e 89\u003c\/p\u003e \u003cp\u003e3.4.3 Warming Up Keil\u003csup\u003e®\u003c\/sup\u003e MDK Cortex-M Kit with Example Projects 91\u003c\/p\u003e \u003cp\u003e3.4.4 The Functions of the Keil\u003csup\u003e®\u003c\/sup\u003e MDK-ARM\u003csup\u003e®\u003c\/sup\u003e μVersion\u003csup\u003e®\u003c\/sup\u003e5 GUI 95\u003c\/p\u003e \u003cp\u003e3.5 Embedded Software Development Procedure 127\u003c\/p\u003e \u003cp\u003e3.6 The Keil\u003csup\u003e®\u003c\/sup\u003e ARM\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003e-MDK μVision5 Debugger and Debug Process 128\u003c\/p\u003e \u003cp\u003e3.6.1 The ARM\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003eμVision5 Debug Architecture 129\u003c\/p\u003e \u003cp\u003e3.6.2 The ARM\u003csup\u003e®\u003c\/sup\u003e Debug Adaptor and Debug Adaptor Driver 130\u003c\/p\u003e \u003cp\u003e3.6.3 Tiva\u003csup\u003eTM\u003c\/sup\u003eCSeries LaunchPad\u003csup\u003eTM \u003c\/sup\u003eDebug Adaptor and Debug Adaptor Driver 132\u003c\/p\u003e \u003cp\u003e3.6.4 The ARM\u003csup\u003e®\u003c\/sup\u003e μVersion5 Debug Process 133\u003c\/p\u003e \u003cp\u003e3.6.5 The ARM\u003csup\u003e®\u003c\/sup\u003e Trace Feature 134\u003c\/p\u003e \u003cp\u003e3.6.6 The ARM\u003csup\u003e®\u003c\/sup\u003e Instruction Set Simulator 136\u003c\/p\u003e \u003cp\u003e3.6.7 The ARM\u003csup\u003e®\u003c\/sup\u003e Programs Running from SRAM 137\u003c\/p\u003e \u003cp\u003e3.6.8 ARM\u003csup\u003e®\u003c\/sup\u003e Optimizations 139\u003c\/p\u003e \u003cp\u003e3.7 The TivaWare\u003csup\u003eTM \u003c\/sup\u003efor C Series Software Suite 140\u003c\/p\u003e \u003cp\u003e3.7.1 The TivaWare\u003csup\u003eTM \u003c\/sup\u003eC Series Software Package 142\u003c\/p\u003e \u003cp\u003e3.7.2 TivaWare\u003csup\u003eTM \u003c\/sup\u003eC Series for TM4C123G LaunchPadTM Evaluation Kit 145\u003c\/p\u003e \u003cp\u003e3.8 The TivaWare\u003csup\u003eTM\u003c\/sup\u003e for C Series Utilities and Other Supports 147\u003c\/p\u003e \u003cp\u003e3.8.1 Additional Utilities Provided by TivaWare\u003csup\u003eTM\u003c\/sup\u003e for C Series 148\u003c\/p\u003e \u003cp\u003e3.9 Program Examples 151\u003c\/p\u003e \u003cp\u003e3.10 Chapter Summary 152\u003c\/p\u003e \u003cp\u003eHomework 152\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 4 ARM\u003csup\u003e®\u003c\/sup\u003e Microcontroller Software and Instruction Set 155\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Overview and Introduction 155\u003c\/p\u003e \u003cp\u003e4.2 Introduction to ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003e-M4 Software Development Structure 156\u003c\/p\u003e \u003cp\u003e4.3 Introduction to ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003e-M4 Assembly Instruction Set 157\u003c\/p\u003e \u003cp\u003e4.3.1 The ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003eCortex\u003csup\u003e®\u003c\/sup\u003e-M4 Assembly Language Syntax 158\u003c\/p\u003e \u003cp\u003e4.3.2 The ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Pseudo Instructions 160\u003c\/p\u003e \u003cp\u003e4.3.3 The ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Addressing Modes 161\u003c\/p\u003e \u003cp\u003e4.3.4 The ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Instruction Set Categories 172\u003c\/p\u003e \u003cp\u003e4.4 ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Software Development Procedures 196\u003c\/p\u003e \u003cp\u003e4.5 Using C Language to Develop ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Cortex\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e-M4 Microcontroller Applications 197\u003c\/p\u003e \u003cp\u003e4.5.1 The Standard Data Types Used in Intrinsic Functions 198\u003c\/p\u003e \u003cp\u003e4.5.2 The CMSIS-Core-Specific Intrinsic Functions 200\u003c\/p\u003e \u003cp\u003e4.5.3 The Keil\u003csup\u003e®\u003c\/sup\u003e ARM\u003csup\u003e®\u003c\/sup\u003e Compiler-Specific Intrinsic Functions 202\u003c\/p\u003e \u003cp\u003e4.5.4 Inline Assembler 204\u003c\/p\u003e \u003cp\u003e4.5.5 Idiom Recognition 205\u003c\/p\u003e \u003cp\u003e4.5.6 C Programming Development Guideline and Procedure 206\u003c\/p\u003e \u003cp\u003e4.5.7 The TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 213\u003c\/p\u003e \u003cp\u003e4.6 Chapter Summary 243\u003c\/p\u003e \u003cp\u003eHomework 244\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 5 ARM\u003csup\u003e®\u003c\/sup\u003e Microcontroller Interrupts and Exceptions 261\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Overview and Introduction 261\u003c\/p\u003e \u003cp\u003e5.2 Exceptions and Interrupts in the ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 MCU System 263\u003c\/p\u003e \u003cp\u003e5.2.1 Exception and Interrupt Types 265\u003c\/p\u003e \u003cp\u003e5.2.2 Exceptions and Interrupts Management 265\u003c\/p\u003e \u003cp\u003e5.2.3 Exception and Interrupt Processing 268\u003c\/p\u003e \u003cp\u003e5.3 Exceptions and Interrupts in the TM4C123GH6PM Microcontroller System 273\u003c\/p\u003e \u003cp\u003e5.3.1 Local Interrupt Configurations and Controls for GPIO Pins 273\u003c\/p\u003e \u003cp\u003e5.3.2 Local Interrupt Configurations and Controls for GPIO Ports 276\u003c\/p\u003e \u003cp\u003e5.3.3 Global Interrupt Configurations and Controls 281\u003c\/p\u003e \u003cp\u003e5.3.4 The Vector Table and Vectors Used in the TM4C123GH6PM MCU 282\u003c\/p\u003e \u003cp\u003e5.3.5 The GPIO Interrupt Handling and Processing Procedure 284\u003c\/p\u003e \u003cp\u003e5.4 Developing GPIO Port Interrupt Projects to Handle GPIO Interrupts 285\u003c\/p\u003e \u003cp\u003e5.4.1 Two Software Packages Used in the TM4C123GH6PM MCU System 286\u003c\/p\u003e \u003cp\u003e5.4.2 Using DRA Programming Model to Handle GPIO Interrupts 290\u003c\/p\u003e \u003cp\u003e5.4.3 Using CMSIS Core Macros for NVIC Registers to Handle GPIO Interrupts 294\u003c\/p\u003e \u003cp\u003e5.4.4 Using TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library API Functions to Handle GPIO Interrupts 306\u003c\/p\u003e \u003cp\u003e5.4.5 Using CMSIS Core Access Functions to Handle GPIO Interrupts 313\u003c\/p\u003e \u003cp\u003e5.5 Comparison Among Four Interrupt Programming Methods 317\u003c\/p\u003e \u003cp\u003e5.6 Chapter Summary 318\u003c\/p\u003e \u003cp\u003eHomework 319\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 6 ARM\u003csup\u003e®\u003c\/sup\u003e Microcontroller Memory System 333\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 Overview and Introduction 333\u003c\/p\u003e \u003cp\u003e6.2 Memory Architecture in the TM4C123GH6PM MCU System 334\u003c\/p\u003e \u003cp\u003e6.2.1 Static Random Access Memory (SRAM) 336\u003c\/p\u003e \u003cp\u003e6.2.2 Flash Memory 336\u003c\/p\u003e \u003cp\u003e6.2.3 Flash Memory Protection Control 349\u003c\/p\u003e \u003cp\u003e6.2.4 Internal Read-Only Memory (ROM) 351\u003c\/p\u003e \u003cp\u003e6.2.5 Electrical Erased Programmable Read-Only Memory (EEPROM) 354\u003c\/p\u003e \u003cp\u003e6.3 Memory Map in TM4C123GH6PM MCU System 361\u003c\/p\u003e \u003cp\u003e6.4 Bit-Band Operations 362\u003c\/p\u003e \u003cp\u003e6.4.1 The Mapping Relationship Between the Bit-Band Region and the Bit-Band Alias Region 365\u003c\/p\u003e \u003cp\u003e6.4.2 The Advantages of Using the Bit-Band Operations 365\u003c\/p\u003e \u003cp\u003e6.4.3 An Illustration Example of Using Bit-Band Alias Addresses 367\u003c\/p\u003e \u003cp\u003e6.4.4 Bit-Band Operations for Different Data Sizes 369\u003c\/p\u003e \u003cp\u003e6.4.5 Bit-Band Operations Built in C Programs 369\u003c\/p\u003e \u003cp\u003e6.5 Memory Requirements and Memory Properties 370\u003c\/p\u003e \u003cp\u003e6.5.1 Memory Requirements 371\u003c\/p\u003e \u003cp\u003e6.5.2 Memory Access Attributes 372\u003c\/p\u003e \u003cp\u003e6.5.3 Memory Endianness 373\u003c\/p\u003e \u003cp\u003e6.6 Memory System Programming Methods 375\u003c\/p\u003e \u003cp\u003e6.6.1 The API Functions Used for Flash Memory Programming 376\u003c\/p\u003e \u003cp\u003e6.6.2 The API Functions Used for EEPROM Programming 378\u003c\/p\u003e \u003cp\u003e6.7 Memory System Programming Projects 380\u003c\/p\u003e \u003cp\u003e6.7.1 Flash Memory Programming 380\u003c\/p\u003e \u003cp\u003e6.7.2 EEPROM Programming 401\u003c\/p\u003e \u003cp\u003e6.7.3 Three Kinds of System Header Files in the TM4C123GH6PM MCU System 405\u003c\/p\u003e \u003cp\u003e6.7.4 Build Example EEPROM Programming Projects 408\u003c\/p\u003e \u003cp\u003e6.8 Chapter Summary 420\u003c\/p\u003e \u003cp\u003eHomework 421\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 7 ARM\u003csup\u003e® \u003c\/sup\u003eCortex\u003csup\u003e®\u003c\/sup\u003e-M4 Parallel I\/O Ports Programming 433\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Overview and Introduction 433\u003c\/p\u003e \u003cp\u003e7.2 GPIO Module Architecture and GPIO Port Configuration 434\u003c\/p\u003e \u003cp\u003e7.3 GPIO Port Control Registers 437\u003c\/p\u003e \u003cp\u003e7.3.1 GPIO Port Initialization and Configuration 438\u003c\/p\u003e \u003cp\u003e7.4 On-Board Keypad Interface Programming Project 440\u003c\/p\u003e \u003cp\u003e7.4.1 The Keypad Interfacing Programming Structure 441\u003c\/p\u003e \u003cp\u003e7.4.2 Create the Keypad Interfacing Programming Project (Polling-Driven) 442\u003c\/p\u003e \u003cp\u003e7.4.3 Set Up the Environment to Build and Run the Project 446\u003c\/p\u003e \u003cp\u003e7.5 Analog-to-Digital Converter Programming Project 446\u003c\/p\u003e \u003cp\u003e7.5.1 ADC Modules in the TM4C123GH6PM MCU System 446\u003c\/p\u003e \u003cp\u003e7.5.2 ADC Module Architecture and Functional Block Diagram 447\u003c\/p\u003e \u003cp\u003e7.5.3 ADC Module Components and Signal Descriptions 448\u003c\/p\u003e \u003cp\u003e7.5.4 Analog-to-Digital Converter 470\u003c\/p\u003e \u003cp\u003e7.5.5 Initialization and Configuration 473\u003c\/p\u003e \u003cp\u003e7.5.6 Build the Analog-to-Digital Converter Programming Project 475\u003c\/p\u003e \u003cp\u003e7.5.7 ADC Module API Functions Provided in the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 480\u003c\/p\u003e \u003cp\u003e7.6 PWM-Controlled DC and Step Motors Programming Project 486\u003c\/p\u003e \u003cp\u003e7.6.1 The PWM Principle and Implementations 487\u003c\/p\u003e \u003cp\u003e7.6.2 PWM Modules in the TM4C123GH6PM MCU System 487\u003c\/p\u003e \u003cp\u003e7.6.3 PWM Generator Functional Block Diagram 490\u003c\/p\u003e \u003cp\u003e7.6.4 PWM Module Architecture and Functional Block Diagram 502\u003c\/p\u003e \u003cp\u003e7.6.5 PWM Module Components and Signal Descriptions 509\u003c\/p\u003e \u003cp\u003e7.6.6 PWM Module Initialization and Configuration 513\u003c\/p\u003e \u003cp\u003e7.6.7 PWM Module Architecture in the EduBASE ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Trainer 515\u003c\/p\u003e \u003cp\u003e7.6.8 Build an Example PWM Programming Project 516\u003c\/p\u003e \u003cp\u003e7.7 The PWM API Functions in the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 521\u003c\/p\u003e \u003cp\u003e7.7.1 PWM Modules and Generators Configuration and Set Up Control Functions 521\u003c\/p\u003e \u003cp\u003e7.7.2 PWM Output Control Functions 523\u003c\/p\u003e \u003cp\u003e7.7.3 PWM Interrupt and Fault Control Functions 523\u003c\/p\u003e \u003cp\u003e7.8 Chapter Summary 525\u003c\/p\u003e \u003cp\u003eHomework 527\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 8 ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Serial I\/O Ports Programming 547\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e8.1 Overview and Introduction 547\u003c\/p\u003e \u003cp\u003e8.2 GPIO Module Architecture and GPIO Port Configuration 548\u003c\/p\u003e \u003cp\u003e8.3 Synchronous Serial Interface (SSI) 551\u003c\/p\u003e \u003cp\u003e8.3.1 Asynchronous and Synchronous Communication Protocols and Data Framing 552\u003c\/p\u003e \u003cp\u003e8.3.2 Synchronous Serial Interface Architecture and Functional Block Diagram 555\u003c\/p\u003e \u003cp\u003e8.3.3 The Synchronous Data Transmission Format and Frame 556\u003c\/p\u003e \u003cp\u003e8.3.4 SSI Module Components and Signal Descriptions 560\u003c\/p\u003e \u003cp\u003e8.3.5 Build the On-Board LCD Interface Programming Project 572\u003c\/p\u003e \u003cp\u003e8.3.6 Build On-Board 7-Segment LED Interface Programming Project 589\u003c\/p\u003e \u003cp\u003e8.3.7 Build Digital-to-Analog Converter Programming Project 595\u003c\/p\u003e \u003cp\u003e8.3.8 SSI API Functions Provided by TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 604\u003c\/p\u003e \u003cp\u003e8.4 Inter-Integrated Circuit (I2C) Interface 611\u003c\/p\u003e \u003cp\u003e8.4.1 I2C Module Bus Configuration and Operational Status 612\u003c\/p\u003e \u003cp\u003e8.4.2 I2C Module Architecture and Functional Block Diagram 613\u003c\/p\u003e \u003cp\u003e8.4.3 I2C Module Data Transfer Format and Frame 614\u003c\/p\u003e \u003cp\u003e8.4.4 I2C Module Operational Sequence 614\u003c\/p\u003e \u003cp\u003e8.4.5 I2C Module Major Operational Components and Control Signals 618\u003c\/p\u003e \u003cp\u003e8.4.6 I2C Module Running Speeds (Clock Rates) and Interrupts 620\u003c\/p\u003e \u003cp\u003e8.4.7 I2C Interface Control Signals and GPIO I2C Control Registers 622\u003c\/p\u003e \u003cp\u003e8.4.8 I2C Module Control Registers and Their Functions 623\u003c\/p\u003e \u003cp\u003e8.4.9 I2C Module Initializations and Configurations 630\u003c\/p\u003e \u003cp\u003e8.4.10 Build an Example I2C Module Project 631\u003c\/p\u003e \u003cp\u003e8.4.10.1 The BQ32000 Real Time Clock (RTC) 631\u003c\/p\u003e \u003cp\u003e8.4.10.2 The Interface Between the BQ32000 and EduBASE ARM\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e Trainer 633\u003c\/p\u003e \u003cp\u003e8.4.10.3 Create a DRA Model I2C Project DRAI2C 634\u003c\/p\u003e \u003cp\u003e8.4.10.4 Create the Source File DRAI2C 634\u003c\/p\u003e \u003cp\u003e8.4.10.5 Set Up the Environment to Build and Run the Project 638\u003c\/p\u003e \u003cp\u003e8.4.11 I2C API Functions Provided by TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 639\u003c\/p\u003e \u003cp\u003e8.4.11.1 Master Operations 639\u003c\/p\u003e \u003cp\u003e8.4.11.2 I2C Module Status and Initialization API Functions 640\u003c\/p\u003e \u003cp\u003e8.4.11.3 I2C Module Sending and Receiving Data API Functions 641\u003c\/p\u003e \u003cp\u003e8.5 Universal Asynchronous Receivers\/Transmitters (UARTs) 642\u003c\/p\u003e \u003cp\u003e8.5.1 Asynchronous Serial Communication Protocols and Data Framing 642\u003c\/p\u003e \u003cp\u003e8.5.2 Asynchronous Serial Interface Architecture and Functional Block Diagram 643\u003c\/p\u003e \u003cp\u003e8.5.3 UART Module Operations and Control Registers 645\u003c\/p\u003e \u003cp\u003e8.5.4 UART Module Control Signals and Related GPIO Pins 658\u003c\/p\u003e \u003cp\u003e8.5.5 UART Module Initializations and Configurations 659\u003c\/p\u003e \u003cp\u003e8.5.6 Build an Example UART Module Project 660\u003c\/p\u003e \u003cp\u003e8.5.7 The UART API Functions Provided by the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 664\u003c\/p\u003e \u003cp\u003e8.6 Chapter Summary 668\u003c\/p\u003e \u003cp\u003eHomework 669\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 9 ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Timer and USB Programming 691\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e9.1 Overview and Introduction 691\u003c\/p\u003e \u003cp\u003e9.2 General-Purpose Timers 692\u003c\/p\u003e \u003cp\u003e9.2.1 The GPTM Architecture and Functional Block Diagram 693\u003c\/p\u003e \u003cp\u003e9.2.2 The General-Purpose Timer Module Components 694\u003c\/p\u003e \u003cp\u003e9.2.3 The General-Purpose Timer Module Operational Modes 695\u003c\/p\u003e \u003cp\u003e9.2.4 The General-Purpose Timer Module Registers 704\u003c\/p\u003e \u003cp\u003e9.2.5 The General-Purpose Timer Module GPIO-Related Control Signals 712\u003c\/p\u003e \u003cp\u003e9.2.6 The General-Purpose Timer Module Initializations and Configurations 713\u003c\/p\u003e \u003cp\u003e9.2.7 Build an Example General Purpose Timer Project 717\u003c\/p\u003e \u003cp\u003e9.2.8 Popular Implementations on GPTM Modules 718\u003c\/p\u003e \u003cp\u003e9.2.9 The API Functions Used for General-Purpose Timer Module 727\u003c\/p\u003e \u003cp\u003e9.3 Watchdog Timers 732\u003c\/p\u003e \u003cp\u003e9.3.1 The Watchdog Timer Architecture and Functional Block Diagram 734\u003c\/p\u003e \u003cp\u003e9.3.2 The Watchdog Timer Operational Sequence and Timing Access 735\u003c\/p\u003e \u003cp\u003e9.3.3 The Watchdog Timer Registers 735\u003c\/p\u003e \u003cp\u003e9.3.4 The Watchdog Timer Module Initializations and Configurations 738\u003c\/p\u003e \u003cp\u003e9.3.5 Build an Example Watchdog Timer Project 739\u003c\/p\u003e \u003cp\u003e9.3.6 The API Functions Used for Watchdog Timer Modules 739\u003c\/p\u003e \u003cp\u003e9.4 Universal Serial Bus (USB) Controller 743\u003c\/p\u003e \u003cp\u003e9.4.1 The Hardware Configuration of the USB Devices 744\u003c\/p\u003e \u003cp\u003e9.4.2 The USB Components and Operational Sequence 745\u003c\/p\u003e \u003cp\u003e9.4.3 The Serial Interface Protocol of the USB Communications 747\u003c\/p\u003e \u003cp\u003e9.4.4 The USB Interface Used in the Embedded System 748\u003c\/p\u003e \u003cp\u003e9.4.5 The USB in the TM4C123GH6PM MCU System 749\u003c\/p\u003e \u003cp\u003e9.4.6 The USB Registers 761\u003c\/p\u003e \u003cp\u003e9.4.7 The USB Initializations and Configurations 774\u003c\/p\u003e \u003cp\u003e9.4.8 A USB Implementation Example Project 775\u003c\/p\u003e \u003cp\u003e9.4.9 The USB API Functions Provided by the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 780\u003c\/p\u003e \u003cp\u003e9.4.10 Build a USB Implementation Example Project Using the API Functions 788\u003c\/p\u003e \u003cp\u003e9.5 Chapter Summary 788\u003c\/p\u003e \u003cp\u003eHomework 790\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 10 ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Other Peripherals Programming 805\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e10.1 Overview and Introduction 805\u003c\/p\u003e \u003cp\u003e10.2 The Controller Area Network (CAN) 805\u003c\/p\u003e \u003cp\u003e10.2.1 CAN Standard Frame 806\u003c\/p\u003e \u003cp\u003e10.2.2 CAN Extended Frame 807\u003c\/p\u003e \u003cp\u003e10.2.3 Detecting and Signaling Errors 808\u003c\/p\u003e \u003cp\u003e10.2.4 The CAN Functional Block Diagram in the TM4C123GH6PM System 809\u003c\/p\u003e \u003cp\u003e10.2.5 The CAN Components and Operational Procedures 810\u003c\/p\u003e \u003cp\u003e10.2.6 The CAN Module Registers 823\u003c\/p\u003e \u003cp\u003e10.2.7 The CAN Module Interfacing and External Control Signals 833\u003c\/p\u003e \u003cp\u003e10.2.8 The CAN API Functions Provided by TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 834\u003c\/p\u003e \u003cp\u003e10.2.9 A CAN Module Implementation Example Project 838\u003c\/p\u003e \u003cp\u003e10.3 The Quadrature Encoder Interface (QEI) 847\u003c\/p\u003e \u003cp\u003e10.3.1 Introduction to Quadrature Encoder 847\u003c\/p\u003e \u003cp\u003e10.3.2 The Working Principle of the Increment Rotary Encoder 849\u003c\/p\u003e \u003cp\u003e10.3.3 The Increment Rotary Encoder Applied in the Closed-Loop Control System 850\u003c\/p\u003e \u003cp\u003e10.3.4 The Increment Rotary Encoder Applied in the TM4C123GH6PM MCU System 851\u003c\/p\u003e \u003cp\u003e10.3.5 The QEI Module Registers 852\u003c\/p\u003e \u003cp\u003e10.3.6 The QEI Interfacing Signals and Related GPIO Pins 856\u003c\/p\u003e \u003cp\u003e10.3.7 The QEI Initialization and Configuration Process 856\u003c\/p\u003e \u003cp\u003e10.3.8 QEI API Functions Provided by the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 857\u003c\/p\u003e \u003cp\u003e10.3.9 An Implementation of Using Rotary Encoder for a Closed-Loop Control System 860\u003c\/p\u003e \u003cp\u003e10.4 The Continuous and Discrete PID Closed-Loop Control System 871\u003c\/p\u003e \u003cp\u003e10.4.1 Identify the Dynamic Model for the Motor Plant 873\u003c\/p\u003e \u003cp\u003e10.4.2 Design the PID Controller Using the MATLAB\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003eControl System Toolbox\u003csup\u003eTM \u003c\/sup\u003e878\u003c\/p\u003e \u003cp\u003e10.4.3 Simulate the PID Control System Using the MATLAB\u003cb\u003e\u003csup\u003e® \u003c\/sup\u003e\u003c\/b\u003eSIMULINK\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e 881\u003c\/p\u003e \u003cp\u003e10.4.4 Build the Control Software to Implement the PID Controller 883\u003c\/p\u003e \u003cp\u003e10.5 The Fuzzy Logic Closed-Loop Control System 887\u003c\/p\u003e \u003cp\u003e10.5.1 The Fuzzification Process 887\u003c\/p\u003e \u003cp\u003e10.5.2 Design of Control Rules 889\u003c\/p\u003e \u003cp\u003e10.5.3 The Defuzzification Process 889\u003c\/p\u003e \u003cp\u003e10.5.4 Apply the Fuzzy Logic Controller to the DC Motor Control System 891\u003c\/p\u003e \u003cp\u003e10.5.5 Build the Fuzzy Logic Control Project Fuzzy-Control 894\u003c\/p\u003e \u003cp\u003e10.6 The Analog Comparators 899\u003c\/p\u003e \u003cp\u003e10.6.1 The Analog Comparator Architecture and Functional Block Diagram 899\u003c\/p\u003e \u003cp\u003e10.6.2 The Control Registers Used in the Analog Comparator Modules 899\u003c\/p\u003e \u003cp\u003e10.6.3 The Voltage Reference Registers Used in the Analog Comparator Modules 900\u003c\/p\u003e \u003cp\u003e10.6.4 The Interrupt Processing Registers Used in the Analog Comparator Modules 903\u003c\/p\u003e \u003cp\u003e10.6.5 The Input and Output Control Signals Used in the Analog Comparators 903\u003c\/p\u003e \u003cp\u003e10.6.6 The Initialization and Configuration Process for the Analog Comparator 904\u003c\/p\u003e \u003cp\u003e10.6.7 Build a Project to Test the Functions of the Analog Comparator Module 904\u003c\/p\u003e \u003cp\u003e10.6.8 Set Up the Environments to Build and Run the Project 907\u003c\/p\u003e \u003cp\u003e10.7 Chapter Summary 908\u003c\/p\u003e \u003cp\u003eHomework 909\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 11 ARM\u003csup\u003e®\u003c\/sup\u003e Floating Point Unit (FPU) 927\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e11.1 Overview and Introduction 927\u003c\/p\u003e \u003cp\u003e11.2 Three Types of the Floating-Point Data 928\u003c\/p\u003e \u003cp\u003e11.2.1 The Half-Precision Floating-Point Data 928\u003c\/p\u003e \u003cp\u003e11.2.2 The Single-Precision Floating-Point Data 930\u003c\/p\u003e \u003cp\u003e11.2.3 The Double-Precision Floating-Point Data 932\u003c\/p\u003e \u003cp\u003e11.3 The FPU in the Cortex\u003cb\u003e\u003csup\u003e®\u003c\/sup\u003e\u003c\/b\u003e-M4 MCU 934\u003c\/p\u003e \u003cp\u003e11.3.1 The Architecture of the Floating-Point Registers 934\u003c\/p\u003e \u003cp\u003e11.3.2 The FPU Operational Modes 937\u003c\/p\u003e \u003cp\u003e11.4 Implementing the Floating-Point Unit 938\u003c\/p\u003e \u003cp\u003e11.4.1 Floating-Point Support in CMSIS-Core 938\u003c\/p\u003e \u003cp\u003e11.4.2 Floating-Point Programming in the TM4C123GH6PM MCU System 939\u003c\/p\u003e \u003cp\u003e11.4.3 An FPU Example Project Using the Direct Register Access Model 942\u003c\/p\u003e \u003cp\u003e11.5 Chapter Summary 946\u003c\/p\u003e \u003cp\u003eHomework 946\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 12 ARM\u003csup\u003e®\u003c\/sup\u003e Memory Protection Unit (MPU) 951\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e12.1 Overview and Introduction 951\u003c\/p\u003e \u003cp\u003e12.2 Implementation of the MPU 952\u003c\/p\u003e \u003cp\u003e12.2.1 Memory Regions, Types, and Attributes 953\u003c\/p\u003e \u003cp\u003e12.2.2 MPU Configuration and Control Registers 953\u003c\/p\u003e \u003cp\u003e12.3 Initialization and Configuration of the MPU 959\u003c\/p\u003e \u003cp\u003e12.4 Building A Practical Example MPU Project 960\u003c\/p\u003e \u003cp\u003e12.4.1 Create a New DRA Model MPU Project DRAMPU 960\u003c\/p\u003e \u003cp\u003e12.4.2 Set Up the Environment to Build and Run the Project 963\u003c\/p\u003e \u003cp\u003e12.5 The API Functions Provided by the TivaWare\u003csup\u003eTM \u003c\/sup\u003ePeripheral Driver Library 964\u003c\/p\u003e \u003cp\u003e12.5.1 The MPU Set Up and Status API Functions 965\u003c\/p\u003e \u003cp\u003e12.5.2 The MPU Enable and Disable API Functions 967\u003c\/p\u003e \u003cp\u003e12.5.3 The MPU Interrupt Handler Control API Functions 968\u003c\/p\u003e \u003cp\u003e12.6 Chapter Summary 969\u003c\/p\u003e \u003cp\u003eHomework 970\u003c\/p\u003e \u003cp\u003eIndex 975\u003c\/p\u003e \u003cp\u003eAbout the Author 987\u003c\/p\u003e  \u003cp\u003e\u003cb\u003eDr. Ying Bai\u003c\/b\u003e is a Professor in the Department of Computer Science and Engineering at Johnson C. Smith University (JCSU). Before joining JCSU, Dr. Bai worked as a software and senior software engineer at Motorola MMS, Schlumberger ATE Technology, Immix TeleCom, and LAM Research. He has published twelve books with publishers such as Prentice Hall, CRC Press LLC, Springer, Cambridge University Press and Wiley-IEEE Press in recent years.   \u003c\/p\u003e\u003cp\u003e\u003cb\u003eThis book introduces the basic concepts and practical techniques in designing and building ARM\u003csup\u003e®\u003c\/sup\u003e microcontrollers in industrial and commercial applications\u003c\/b\u003e \u003c\/p\u003e\u003cp\u003e\u003ci\u003ePractical Microcontroller Engineering with ARM\u003csup\u003e®\u003c\/sup\u003e Technology\u003c\/i\u003e provides the full scope of components and materials related to ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e–M4 microcontroller systems. Chapters 2 through 9 provide the fundamentals and detailed discussions about ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 MCU applications with the most widely used peripherals such as flash memory, EEPROM, ADC, DAC, PWM, UART, USB, I2C, SSI, LCD and GPTM. The remaining chapters cover advanced and optional peripherals such as Control Area Network (CAN), Quadrature Encoder Interface (QEI), Analog Comparators (ACMP) and detailed discussions of Floating Point Unit (FPU) and ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 Memory Protection Unit (MPU). \u003c\/p\u003e\u003cp\u003eSpecial features of this book: \u003c\/p\u003e\u003cul\u003e \u003cli\u003eThe first microcontroller textbook to provide complete and systemic introductions and technologies to cover all components and materials related to ARM\u003csup\u003e®\u003c\/sup\u003e Cortex\u003csup\u003e®\u003c\/sup\u003e-M4 microcontroller system, including hardware and software, as well as practical applications with real examples\u003c\/li\u003e \u003cli\u003eARM\u003csup\u003e®\u003c\/sup\u003e assembly and C codes to assist users to develop professional projects with any language easily and efficiently\u003c\/li\u003e \u003cli\u003e70+ real-life example projects on the most popular peripherals with detailed line-by-line explanations and illustrations\u003c\/li\u003e \u003cli\u003eBoth the Direct Register Access (DRA) model and the Software Driver (SD) model programming techniques with complete and applicable projects\u003c\/li\u003e \u003cli\u003eEnd-of-Chapter homework problems, including true\/false and multiple choice questions, as well as lab projects\u003c\/li\u003e \u003cli\u003e12 chapters of teaching slides as well as homework and lab solutions for instructors\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003eWritten for both students and experienced programmers, this book covers ARM Cortex-M4 in an easy-to-understand format, while providing the reader with the ability to test their knowledge through exercises throughout the book.\u003c\/p\u003e","brand":"Wiley-IEEE Press","offers":[{"title":"Default Title","offer_id":47989834186981,"sku":"NP9781119052371","price":117.95,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1842\/7735\/files\/9781119052371.jpg?v=1761785619","url":"https:\/\/k12savings.com\/es\/products\/practical-microcontroller-engineering-with-arm-technology-isbn-9781119052371","provider":"K12savings","version":"1.0","type":"link"}