{"product_id":"integrated-circuit-manufacturability-isbn-9780780334472","title":"Integrated Circuit Manufacturability","description":"\"INTEGRATED CIRCUIT MANUFACTURABILITY provides comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage.\u003cbr\u003e \u003cbr\u003e INTEGRATED CIRCUIT MANUFACTURABILITY illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today's design practices:\u003cbr\u003e \u003cbr\u003e \u003cbr\u003e * Yield management strategies\u003cbr\u003e * Effects of spot defects\u003cbr\u003e * Inductive fault analysis and testing\u003cbr\u003e * Fault-tolerant architectures and MCM testing strategies.\u003cbr\u003e \u003cbr\u003e \u003cbr\u003e This book will serve design and product engineers both from academia and industry. It can also be used as a reference or textbook for introductory graduate-level courses on manufacturing.\"  Preface.\u003cbr\u003e \u003cbr\u003e Introduction (Jose Pineda de Gyvez).\u003cbr\u003e \u003cbr\u003e Defect Monitoring and Characterization (Eric Bruls).\u003cbr\u003e \u003cbr\u003e Digital CMOS Fault Modeling and Inductive Fault Analysis (Manoj Sachdev).\u003cbr\u003e \u003cbr\u003e Functional Yield Modeling (Gary C. Cheek and Geoff O'Donoghue).\u003cbr\u003e \u003cbr\u003e Critical Area and Fault Probability Prediction (D.M.H. Walker).\u003cbr\u003e \u003cbr\u003e Statistical Methods of Parametric Yield and Quality Enhancement (Maciej Styblinski).\u003cbr\u003e \u003cbr\u003e Architectural Fault Tolerance (S.K. Tewksbury).\u003cbr\u003e \u003cbr\u003e Design for Test and Manufacturability (Dhiraj Pradhan and Adit Singh).\u003cbr\u003e \u003cbr\u003e Testing Solutions for MCM Manufacturing (Yervant Zorian).\u003cbr\u003e \u003cbr\u003e Index.\u003cbr\u003e \u003cbr\u003e About the Editors.  About the Editors...\u003cbr\u003e Jose Pineda de Gyvez is an associate professor in the Department of Electrical Engineering, holding a joint faculty appointment with the Department of Computer Science, at Texas A\u0026amp;M University. Dr. Pineda de Gyvez was associate editor of technology for IEEE Transactions on Semiconductor Manufacturing and associate editor for cellular neural networks for IEEE Transactions on Circuits and Systems: Part 1.\u003cbr\u003e Dhiraj K. Pradhan is currently a visiting professor with the Department of Electrical Engineering at Stanford University (on leave from Texas A\u0026amp;M University.) Prior to joining Texas A\u0026amp;M, he served as professor and coordinator of computer engineering at the University of Massachusetts. Dr. Pradhan has contributed to VLSI CAD and test fault-tolerant computing, computer architecture, and parallel processing research with major publications in journals and conferences over the last 25 years.  Electrical Engineering Integrated Circuit Manufacturability The Art of Process and Design Integration Integrated Circuit Manufacturability provides comprehensive coverage of the process and design variables that determine the ease and feasibility of the fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage. Integrated Circuit Manufacturability illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today’s design practices: \u003cul\u003e \u003cli\u003eYield management strategies\u003c\/li\u003e \u003cli\u003eEffects of spot defects\u003c\/li\u003e \u003cli\u003eInductive fault analysis and testing\u003c\/li\u003e \u003cli\u003eFault-tolerant architectures and MCM testing strategies\u003c\/li\u003e \u003c\/ul\u003e This book will serve design and product engineers both from academia and industry. It can also be used as a reference or textbook for introductory graduate-level courses on manufacturing.","brand":"Wiley-IEEE Press","offers":[{"title":"Default Title","offer_id":47989436088549,"sku":"NP9780780334472","price":267.95,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1842\/7735\/files\/9780780334472.jpg?v=1761784092","url":"https:\/\/k12savings.com\/es\/products\/integrated-circuit-manufacturability-isbn-9780780334472","provider":"K12savings","version":"1.0","type":"link"}