{"product_id":"digital-systems-design-with-vhdl-and-synthesis-isbn-9780769500232","title":"Digital Systems Design with VHDL and Synthesis","description":"K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together.  \u003cp\u003e\u003ci\u003eDigital Systems Design with VHDL and Synthesis\u003c\/i\u003e focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.\u003c\/p\u003e \u003cp\u003eUnique features of the book include the following:\u003c\/p\u003e \u003cul\u003e \u003cli\u003eVHDL code explained line by line to capture the logic behind the design concepts\u003c\/li\u003e \u003cli\u003eSimulation waveforms, synthesized schematics, and results are shown, verified, and analyzed\u003c\/li\u003e \u003cli\u003eVHDL code is synthesized and commands and strategies are discussed\u003c\/li\u003e \u003cli\u003eVariations on the design techniques and common mistakes are addressed\u003c\/li\u003e \u003cli\u003eDemonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study\u003c\/li\u003e \u003cli\u003eTest bench, post-layout verification, and test vector generation processes are illustrated\u003c\/li\u003e \u003c\/ul\u003e  Chapter 1: Introduction.\u003cbr\u003e \u003cbr\u003e Chapter 2: VHDL and Digital Circuit Primitives.\u003cbr\u003e \u003cbr\u003e Chapter 3: VHDL Simulation and Synthesis Environment and Design Process.\u003cbr\u003e \u003cbr\u003e Chapter 4: Basic Combinational Circuits.\u003cbr\u003e \u003cbr\u003e Chapter 5: Basic Binary Arithmetic Circuits.\u003cbr\u003e \u003cbr\u003e Chapter 6: Basic Sequential Circuits.\u003cbr\u003e \u003cbr\u003e Chapter 7: Registers.\u003cbr\u003e \u003cbr\u003e Chapter 8: Clock and Reset Circuits.\u003cbr\u003e \u003cbr\u003e Chapter 9: Dual-Port RAM, FIFO, and DRAM Modeling.\u003cbr\u003e \u003cbr\u003e Chapter 10: A Design Case Study: Finite Impulse Response Filter ASIC Design.\u003cbr\u003e \u003cbr\u003e Chapter 11: A Design Case Study: A Microprogram Controller Design.\u003cbr\u003e \u003cbr\u003e Chapter 12: Error Detection and Correction.\u003cbr\u003e \u003cbr\u003e Chapter 13: Fixed-Point Multiplication.\u003cbr\u003e \u003cbr\u003e Chapter 14: Fixed-Point Division.\u003cbr\u003e \u003cbr\u003e Chapter 15: Floating-Point Arithmetic.\u003cbr\u003e \u003cbr\u003e Appendix A: Package Pack.\u003cbr\u003e \u003cbr\u003e Index.  \u003cp\u003eKwang-chih Chang, commonly known as K.C. Chang, was a Chinese-American archaeologist and sinologist. He was the John E. Hudson Professor of archaeology at Harvard University, Vice-President of the Academia Sinica, and a curator at the Peabody Museum of Archaeology and Ethnology.   \u003cb\u003eK.C. Chang\u003c\/b\u003e presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together.  \u003c\/p\u003e\u003cp\u003e\u003ci\u003eDigital Systems Design with VHDL and Synthesis\u003c\/i\u003e focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.\u003c\/p\u003e \u003cp\u003e\u003cb\u003eUnique features of the book include the following:\u003c\/b\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eVHDL code explained line by line to capture the logic behind the design concepts\u003c\/li\u003e \u003cli\u003eSimulation waveforms, synthesized schematics, and results are shown, verified, and analyzed\u003c\/li\u003e \u003cli\u003eVHDL code is synthesized and commands and strategies are discussed\u003c\/li\u003e \u003cli\u003eVariations on the design techniques and common mistakes are addressed\u003c\/li\u003e \u003cli\u003eDemonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study\u003c\/li\u003e \u003cli\u003eTest bench, post-layout verification, and test vector generation processes are illustrated\u003c\/li\u003e \u003c\/ul\u003e","brand":"Wiley-IEEE Computer Society Pr","offers":[{"title":"Default Title","offer_id":47989069349093,"sku":"NP9780769500232","price":149.95,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1842\/7735\/files\/9780769500232.jpg?v=1761782668","url":"https:\/\/k12savings.com\/es\/products\/digital-systems-design-with-vhdl-and-synthesis-isbn-9780769500232","provider":"K12savings","version":"1.0","type":"link"}