{"product_id":"design-for-embedded-image-processing-on-fpgas-isbn-9781119819790","title":"Design for Embedded Image Processing on FPGAs","description":"\u003cb\u003eDesign for Embedded Image Processing on FPGAs\u003c\/b\u003e \u003cp\u003e\u003cb\u003eBridge the gap between software and hardware with this foundational design reference\u003c\/b\u003e \u003c\/p\u003e\u003cp\u003eField-programmable gate arrays (FPGAs) are integrated circuits designed so that configuration can take place. Circuits of this kind play an integral role in processing images, with FPGAs increasingly embedded in digital cameras and other devices that produce visual data outputs for subsequent realization and compression. These uses of FPGAs require specific design processes designed to mediate smoothly between hardware and processing algorithm. \u003c\/p\u003e\u003cp\u003e\u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e provides a comprehensive overview of these processes and their applications in embedded image processing. Beginning with an overview of image processing and its core principles, this book discusses specific design and computation techniques, with a smooth progression from the foundations of the field to its advanced principles.  \u003c\/p\u003e\u003cp\u003eReaders of the second edition of \u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e will also find: \u003c\/p\u003e\u003cul\u003e\n\u003cli\u003eDetailed discussion of image processing techniques including point operations, histogram operations, linear transformations, and more\u003c\/li\u003e \u003cli\u003eNew chapters covering Deep Learning algorithms and Image and Video Coding\u003c\/li\u003e \u003cli\u003eExample applications throughout to ground principles and demonstrate techniques\u003c\/li\u003e\n\u003c\/ul\u003e \u003cp\u003e\u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e is ideal for engineers and academics working in the field of Image Processing, as well as graduate students studying Embedded Systems Engineering, Image Processing, Digital Design, and related fields. \u003c\/p\u003e\u003cp\u003ePreface xiii\u003c\/p\u003e \u003cp\u003eAcknowledgments xix\u003c\/p\u003e \u003cp\u003eAbout the Companion Website xxi\u003c\/p\u003e \u003cp\u003e\u003cb\u003e1 Image Processing 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 Basic Definitions 1\u003c\/p\u003e \u003cp\u003e1.2 Image Formation 3\u003c\/p\u003e \u003cp\u003e1.2.1 Optics 3\u003c\/p\u003e \u003cp\u003e1.2.2 Colour 5\u003c\/p\u003e \u003cp\u003e1.3 Image Processing Operations 6\u003c\/p\u003e \u003cp\u003e1.4 Real-time Image Processing 8\u003c\/p\u003e \u003cp\u003e1.5 Embedded Image Processing 9\u003c\/p\u003e \u003cp\u003e1.6 Computer Architecture 10\u003c\/p\u003e \u003cp\u003e1.7 Parallelism 11\u003c\/p\u003e \u003cp\u003e1.7.1 Temporal or Task Parallelism 12\u003c\/p\u003e \u003cp\u003e1.7.2 Spatial or Data Parallelism 13\u003c\/p\u003e \u003cp\u003e1.7.3 Logical Parallelism 14\u003c\/p\u003e \u003cp\u003e1.7.4 Stream Processing 14\u003c\/p\u003e \u003cp\u003e1.8 Summary 15\u003c\/p\u003e \u003cp\u003eReferences 16\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2 Field-programmable Gate Arrays 19\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 Hardware Architecture of FPGAs 19\u003c\/p\u003e \u003cp\u003e2.1.1 Logic 21\u003c\/p\u003e \u003cp\u003e2.1.2 DSP Blocks 22\u003c\/p\u003e \u003cp\u003e2.1.3 Memory 23\u003c\/p\u003e \u003cp\u003e2.1.4 Embedded CPU 23\u003c\/p\u003e \u003cp\u003e2.1.5 Interconnect 24\u003c\/p\u003e \u003cp\u003e2.1.6 Input and Output 24\u003c\/p\u003e \u003cp\u003e2.1.7 Clocking 26\u003c\/p\u003e \u003cp\u003e2.1.8 Configuration 26\u003c\/p\u003e \u003cp\u003e2.1.9 FPGAs vs. ASICs 27\u003c\/p\u003e \u003cp\u003e2.2 Programming FPGAs 28\u003c\/p\u003e \u003cp\u003e2.2.1 Register Transfer Level 30\u003c\/p\u003e \u003cp\u003e2.2.2 Hardware Description Languages 32\u003c\/p\u003e \u003cp\u003e2.2.3 High-level Synthesis 33\u003c\/p\u003e \u003cp\u003e2.3 FPGAs and Image Processing 38\u003c\/p\u003e \u003cp\u003e2.3.1 Choosing an FPGA or Development Board 39\u003c\/p\u003e \u003cp\u003e2.4 Summary 40\u003c\/p\u003e \u003cp\u003eReferences 41\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3 Design Process 45\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Problem Specification 45\u003c\/p\u003e \u003cp\u003e3.2 Algorithm Development 47\u003c\/p\u003e \u003cp\u003e3.2.1 Algorithm Development Process 47\u003c\/p\u003e \u003cp\u003e3.2.2 Algorithm Structure 48\u003c\/p\u003e \u003cp\u003e3.2.3 FPGA Development Issues 51\u003c\/p\u003e \u003cp\u003e3.3 Architecture Selection 51\u003c\/p\u003e \u003cp\u003e3.3.1 System Architecture 52\u003c\/p\u003e \u003cp\u003e3.3.2 Partitioning Between Hardware and Software 53\u003c\/p\u003e \u003cp\u003e3.3.3 Computational Architecture 55\u003c\/p\u003e \u003cp\u003e3.4 System Implementation 60\u003c\/p\u003e \u003cp\u003e3.4.1 Mapping to FPGA Resources 60\u003c\/p\u003e \u003cp\u003e3.4.2 Algorithm Mapping Issues 62\u003c\/p\u003e \u003cp\u003e3.5 Testing and Debugging 63\u003c\/p\u003e \u003cp\u003e3.5.1 Design 63\u003c\/p\u003e \u003cp\u003e3.5.2 Implementation 64\u003c\/p\u003e \u003cp\u003e3.5.3 Common Implementation Bugs 64\u003c\/p\u003e \u003cp\u003e3.5.4 Timing 66\u003c\/p\u003e \u003cp\u003e3.5.5 System Debugging 68\u003c\/p\u003e \u003cp\u003e3.5.6 Algorithm Tuning 70\u003c\/p\u003e \u003cp\u003e3.5.7 In-field Diagnosis 71\u003c\/p\u003e \u003cp\u003e3.6 Summary 72\u003c\/p\u003e \u003cp\u003eReferences 73\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4 Design Constraints 77\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Timing Constraints 77\u003c\/p\u003e \u003cp\u003e4.1.1 Low-level Pipelining 78\u003c\/p\u003e \u003cp\u003e4.1.2 Process Synchronisation 80\u003c\/p\u003e \u003cp\u003e4.1.3 Synchronising Between Clock Domains 82\u003c\/p\u003e \u003cp\u003e4.1.4 I\/O Constraints 83\u003c\/p\u003e \u003cp\u003e4.2 Memory Bandwidth Constraints 84\u003c\/p\u003e \u003cp\u003e4.2.1 Memory Architectures 84\u003c\/p\u003e \u003cp\u003e4.2.2 Caching 86\u003c\/p\u003e \u003cp\u003e4.2.3 Row Buffering 87\u003c\/p\u003e \u003cp\u003e4.3 Resource Constraints 88\u003c\/p\u003e \u003cp\u003e4.3.1 Bit-serial Computation 89\u003c\/p\u003e \u003cp\u003e4.3.2 Resource Multiplexing 89\u003c\/p\u003e \u003cp\u003e4.3.3 Arbitration 92\u003c\/p\u003e \u003cp\u003e4.3.4 Resource Controllers 94\u003c\/p\u003e \u003cp\u003e4.3.5 Reconfigurability 95\u003c\/p\u003e \u003cp\u003e4.4 Power Constraints 97\u003c\/p\u003e \u003cp\u003e4.5 Performance Metrics 98\u003c\/p\u003e \u003cp\u003e4.5.1 Speed 99\u003c\/p\u003e \u003cp\u003e4.5.2 Resources 99\u003c\/p\u003e \u003cp\u003e4.5.3 Power 99\u003c\/p\u003e \u003cp\u003e4.5.4 Cost 100\u003c\/p\u003e \u003cp\u003e4.5.5 Application Metrics 100\u003c\/p\u003e \u003cp\u003e4.6 Summary 101\u003c\/p\u003e \u003cp\u003eReferences 102\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5 Computational Techniques 105\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Number Systems 105\u003c\/p\u003e \u003cp\u003e5.1.1 Binary Integers 105\u003c\/p\u003e \u003cp\u003e5.1.2 Residue Systems 106\u003c\/p\u003e \u003cp\u003e5.1.3 Redundant Representations 107\u003c\/p\u003e \u003cp\u003e5.1.4 Fixed-point Numbers 107\u003c\/p\u003e \u003cp\u003e5.1.5 Floating-point Numbers 108\u003c\/p\u003e \u003cp\u003e5.1.6 Logarithmic Number System 110\u003c\/p\u003e \u003cp\u003e5.1.7 Posit Numbers 110\u003c\/p\u003e \u003cp\u003e5.2 Elementary Functions 111\u003c\/p\u003e \u003cp\u003e5.2.1 Square Root 111\u003c\/p\u003e \u003cp\u003e5.2.2 Trigonometric Functions 112\u003c\/p\u003e \u003cp\u003e5.2.3 Linear CORDIC 116\u003c\/p\u003e \u003cp\u003e5.2.4 Hyperbolic Functions 117\u003c\/p\u003e \u003cp\u003e5.2.5 Logarithms and Exponentials 118\u003c\/p\u003e \u003cp\u003e5.2.6 Lookup Tables 118\u003c\/p\u003e \u003cp\u003e5.2.7 Polynomial Approximations 122\u003c\/p\u003e \u003cp\u003e5.2.8 Iterative Techniques 123\u003c\/p\u003e \u003cp\u003e5.3 Other Computation Techniques 124\u003c\/p\u003e \u003cp\u003e5.3.1 Incremental Update 124\u003c\/p\u003e \u003cp\u003e5.3.2 Separability 124\u003c\/p\u003e \u003cp\u003e5.4 Memory Structures 124\u003c\/p\u003e \u003cp\u003e5.4.1 FIFO Buffer 124\u003c\/p\u003e \u003cp\u003e5.4.2 Zigzag Buffers 126\u003c\/p\u003e \u003cp\u003e5.4.3 Stacks 126\u003c\/p\u003e \u003cp\u003e5.4.4 Linked Lists 127\u003c\/p\u003e \u003cp\u003e5.4.5 Trees 128\u003c\/p\u003e \u003cp\u003e5.4.6 Graphs 129\u003c\/p\u003e \u003cp\u003e5.4.7 Hash Tables 129\u003c\/p\u003e \u003cp\u003e5.5 Summary 130\u003c\/p\u003e \u003cp\u003eReferences 131\u003c\/p\u003e \u003cp\u003e\u003cb\u003e6 Interfacing 135\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 Camera Input 135\u003c\/p\u003e \u003cp\u003e6.1.1 Analogue Video 136\u003c\/p\u003e \u003cp\u003e6.1.2 Direct Digital Interface 137\u003c\/p\u003e \u003cp\u003e6.1.3 MIPI Camera Serial Interface 138\u003c\/p\u003e \u003cp\u003e6.1.4 Camera Link 139\u003c\/p\u003e \u003cp\u003e6.1.5 USB Cameras 139\u003c\/p\u003e \u003cp\u003e6.1.6 GigE Vision 139\u003c\/p\u003e \u003cp\u003e6.1.7 Camera Processing Pipeline 140\u003c\/p\u003e \u003cp\u003e6.2 Display Output 143\u003c\/p\u003e \u003cp\u003e6.2.1 Display Driver 143\u003c\/p\u003e \u003cp\u003e6.2.2 Display Content 146\u003c\/p\u003e \u003cp\u003e6.3 Serial Communication 147\u003c\/p\u003e \u003cp\u003e6.3.1 Rs- 232 147\u003c\/p\u003e \u003cp\u003e6.3.2 I 2 c 148\u003c\/p\u003e \u003cp\u003e6.3.3 Serial Peripheral Interface (SPI) 149\u003c\/p\u003e \u003cp\u003e6.3.4 Universal Serial Bus (USB) 150\u003c\/p\u003e \u003cp\u003e6.3.5 Ethernet 150\u003c\/p\u003e \u003cp\u003e6.3.6 PCI Express 151\u003c\/p\u003e \u003cp\u003e6.4 Off-chip Memory 151\u003c\/p\u003e \u003cp\u003e6.4.1 Static RAM 152\u003c\/p\u003e \u003cp\u003e6.4.2 Dynamic RAM 152\u003c\/p\u003e \u003cp\u003e6.4.3 Flash Memory 155\u003c\/p\u003e \u003cp\u003e6.5 Processors 155\u003c\/p\u003e \u003cp\u003e6.5.1 AXI Interface 155\u003c\/p\u003e \u003cp\u003e6.5.2 Avalon Bus 156\u003c\/p\u003e \u003cp\u003e6.5.3 Operating Systems 157\u003c\/p\u003e \u003cp\u003e6.5.4 Implications for System Design 157\u003c\/p\u003e \u003cp\u003e6.6 Summary 157\u003c\/p\u003e \u003cp\u003eReferences 158\u003c\/p\u003e \u003cp\u003e\u003cb\u003e7 Point Operations 161\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Point Operations on a Single Image 161\u003c\/p\u003e \u003cp\u003e7.1.1 Contrast and Brightness Adjustment 161\u003c\/p\u003e \u003cp\u003e7.1.2 Global Thresholding and Contouring 164\u003c\/p\u003e \u003cp\u003e7.1.3 Lookup Table Implementation 166\u003c\/p\u003e \u003cp\u003e7.2 Point Operations on Multiple Images 167\u003c\/p\u003e \u003cp\u003e7.2.1 Image Averaging 168\u003c\/p\u003e \u003cp\u003e7.2.2 Image Subtraction 170\u003c\/p\u003e \u003cp\u003e7.2.3 Background Modelling 172\u003c\/p\u003e \u003cp\u003e7.2.4 Intensity Scaling 175\u003c\/p\u003e \u003cp\u003e7.2.5 Masking 175\u003c\/p\u003e \u003cp\u003e7.2.6 High Dynamic Range (HDR) Imaging 177\u003c\/p\u003e \u003cp\u003e7.3 Colour 179\u003c\/p\u003e \u003cp\u003e7.3.1 False Colour 179\u003c\/p\u003e \u003cp\u003e7.3.2 Colour Space Conversion 180\u003c\/p\u003e \u003cp\u003e7.3.3 Colour Thresholding 192\u003c\/p\u003e \u003cp\u003e7.3.4 Colour Enhancement 193\u003c\/p\u003e \u003cp\u003e7.3.5 White Balance 194\u003c\/p\u003e \u003cp\u003e7.4 Multi-spectral and Hyperspectral Imaging 197\u003c\/p\u003e \u003cp\u003e7.4.1 Hyperspectral Image Acquisition 197\u003c\/p\u003e \u003cp\u003e7.4.2 Processing Steps 198\u003c\/p\u003e \u003cp\u003e7.5 Summary 199\u003c\/p\u003e \u003cp\u003eReferences 199\u003c\/p\u003e \u003cp\u003e\u003cb\u003e8 Histogram Operations 203\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e8.1 Greyscale Histogram 203\u003c\/p\u003e \u003cp\u003e8.1.1 Building the Histogram 203\u003c\/p\u003e \u003cp\u003e8.1.2 Data Gathering 205\u003c\/p\u003e \u003cp\u003e8.1.3 Histogram Equalisation 209\u003c\/p\u003e \u003cp\u003e8.1.4 Automatic Exposure 214\u003c\/p\u003e \u003cp\u003e8.1.5 Threshold Selection 215\u003c\/p\u003e \u003cp\u003e8.1.6 Histogram Similarity 220\u003c\/p\u003e \u003cp\u003e8.2 Multidimensional Histograms 220\u003c\/p\u003e \u003cp\u003e8.2.1 Triangular Arrays 221\u003c\/p\u003e \u003cp\u003e8.2.2 Multidimensional Statistics 222\u003c\/p\u003e \u003cp\u003e8.2.3 Colour Segmentation 225\u003c\/p\u003e \u003cp\u003e8.2.4 Colour Indexing 228\u003c\/p\u003e \u003cp\u003e8.2.5 Texture Analysis 229\u003c\/p\u003e \u003cp\u003e8.3 Summary 231\u003c\/p\u003e \u003cp\u003eReferences 231\u003c\/p\u003e \u003cp\u003e\u003cb\u003e9 Local Filters 235\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e9.1 Window Caching 235\u003c\/p\u003e \u003cp\u003e9.1.1 Border Handling 237\u003c\/p\u003e \u003cp\u003e9.1.2 Filter Latency 239\u003c\/p\u003e \u003cp\u003e9.2 Linear Filters 239\u003c\/p\u003e \u003cp\u003e9.2.1 Filter Techniques 240\u003c\/p\u003e \u003cp\u003e9.2.2 Noise Smoothing 243\u003c\/p\u003e \u003cp\u003e9.2.3 Edge Detection 246\u003c\/p\u003e \u003cp\u003e9.2.4 Edge Enhancement 248\u003c\/p\u003e \u003cp\u003e9.3 Nonlinear Filters 249\u003c\/p\u003e \u003cp\u003e9.3.1 Gradient Magnitude 249\u003c\/p\u003e \u003cp\u003e9.3.2 Edge Orientation 250\u003c\/p\u003e \u003cp\u003e9.3.3 Peak Detection and Non-maximal Suppression 251\u003c\/p\u003e \u003cp\u003e9.3.4 Zero-crossing Detection 252\u003c\/p\u003e \u003cp\u003e9.3.5 Bilateral Filter 252\u003c\/p\u003e \u003cp\u003e9.3.6 Adaptive Thresholding 253\u003c\/p\u003e \u003cp\u003e9.3.7 High Dynamic Range Tone Mapping 255\u003c\/p\u003e \u003cp\u003e9.4 Rank Filters 256\u003c\/p\u003e \u003cp\u003e9.4.1 Sorting Networks 258\u003c\/p\u003e \u003cp\u003e9.5 Adaptive Histogram Equalisation 262\u003c\/p\u003e \u003cp\u003e9.6 Morphological Filters 262\u003c\/p\u003e \u003cp\u003e9.6.1 Binary Morphology 262\u003c\/p\u003e \u003cp\u003e9.6.2 Greyscale Morphology 266\u003c\/p\u003e \u003cp\u003e9.7 Colour Filtering 268\u003c\/p\u003e \u003cp\u003e9.7.1 Colour Morphology and Vector Median 269\u003c\/p\u003e \u003cp\u003e9.7.2 Edge Enhancement 269\u003c\/p\u003e \u003cp\u003e9.7.3 Bayer Pattern Demosaicing 271\u003c\/p\u003e \u003cp\u003e9.7.4 White Balancing 272\u003c\/p\u003e \u003cp\u003e9.8 Summary 273\u003c\/p\u003e \u003cp\u003eReferences 274\u003c\/p\u003e \u003cp\u003e\u003cb\u003e10 Geometric Transformations 281\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e10.1 Reverse Mapping 282\u003c\/p\u003e \u003cp\u003e10.1.1 Anti-alias Filtering 283\u003c\/p\u003e \u003cp\u003e10.1.2 Interpolation 284\u003c\/p\u003e \u003cp\u003e10.2 Forward Mapping 291\u003c\/p\u003e \u003cp\u003e10.2.1 Separable Mapping 292\u003c\/p\u003e \u003cp\u003e10.2.2 Hybrid Approach 296\u003c\/p\u003e \u003cp\u003e10.3 Common Mappings 297\u003c\/p\u003e \u003cp\u003e10.3.1 Affine Transformation 297\u003c\/p\u003e \u003cp\u003e10.3.2 Perspective Mapping 297\u003c\/p\u003e \u003cp\u003e10.3.3 Polynomial Mapping 298\u003c\/p\u003e \u003cp\u003e10.3.4 Lens Distortion 299\u003c\/p\u003e \u003cp\u003e10.3.5 Non-parametric Mappings 302\u003c\/p\u003e \u003cp\u003e10.4 Image Registration 302\u003c\/p\u003e \u003cp\u003e10.4.1 Feature-based Methods 303\u003c\/p\u003e \u003cp\u003e10.4.2 Area-based Methods 307\u003c\/p\u003e \u003cp\u003e10.4.3 Applications 314\u003c\/p\u003e \u003cp\u003e10.5 Summary 315\u003c\/p\u003e \u003cp\u003eReferences 315\u003c\/p\u003e \u003cp\u003e\u003cb\u003e11 Linear Transforms 321\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e11.1 Discrete Fourier Transform 322\u003c\/p\u003e \u003cp\u003e11.1.1 Fast Fourier Transform (FFT) 323\u003c\/p\u003e \u003cp\u003e11.1.2 Goertzel’s Algorithm 331\u003c\/p\u003e \u003cp\u003e11.1.3 Applications 332\u003c\/p\u003e \u003cp\u003e11.2 Discrete Cosine Transform (DCT) 336\u003c\/p\u003e \u003cp\u003e11.3 Wavelet Transform 338\u003c\/p\u003e \u003cp\u003e11.3.1 Filter Implementations 340\u003c\/p\u003e \u003cp\u003e11.3.2 Applications 344\u003c\/p\u003e \u003cp\u003e11.4 Summary 345\u003c\/p\u003e \u003cp\u003eReferences 345\u003c\/p\u003e \u003cp\u003e\u003cb\u003e12 Image and Video Coding 349\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e12.1 Compression Techniques 350\u003c\/p\u003e \u003cp\u003e12.1.1 Colour Conversion 350\u003c\/p\u003e \u003cp\u003e12.1.2 Prediction and Transformation 350\u003c\/p\u003e \u003cp\u003e12.1.3 Motion Estimation and Compensation 351\u003c\/p\u003e \u003cp\u003e12.1.4 Quantisation 352\u003c\/p\u003e \u003cp\u003e12.1.5 Run-length Coding 353\u003c\/p\u003e \u003cp\u003e12.1.6 Entropy Coding 354\u003c\/p\u003e \u003cp\u003e12.2 DCT-based Codecs 357\u003c\/p\u003e \u003cp\u003e12.2.1 DCT Block Processing 357\u003c\/p\u003e \u003cp\u003e12.2.2 Jpeg 357\u003c\/p\u003e \u003cp\u003e12.2.3 Video Codecs 358\u003c\/p\u003e \u003cp\u003e12.3 Wavelet-based Codecs 359\u003c\/p\u003e \u003cp\u003e12.4 Lossless Compression 360\u003c\/p\u003e \u003cp\u003e12.5 Perceptual Coding 361\u003c\/p\u003e \u003cp\u003e12.6 Coding Hyperspectral Images 362\u003c\/p\u003e \u003cp\u003e12.7 Summary 362\u003c\/p\u003e \u003cp\u003eReferences 363\u003c\/p\u003e \u003cp\u003e\u003cb\u003e13 Blob Detection and Labelling 367\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e13.1 Bounding Box 367\u003c\/p\u003e \u003cp\u003e13.2 Run-length Coding 369\u003c\/p\u003e \u003cp\u003e13.3 Chain Coding 369\u003c\/p\u003e \u003cp\u003e13.3.1 Sequential Implementation 370\u003c\/p\u003e \u003cp\u003e13.3.2 Single-pass Stream Processing Algorithms 370\u003c\/p\u003e \u003cp\u003e13.3.3 Feature Extraction 372\u003c\/p\u003e \u003cp\u003e13.4 Connected Component Labelling (CCL) 374\u003c\/p\u003e \u003cp\u003e13.4.1 Random Access Algorithms 374\u003c\/p\u003e \u003cp\u003e13.4.2 Multiple Pass Algorithms 374\u003c\/p\u003e \u003cp\u003e13.4.3 Two-pass Algorithms 375\u003c\/p\u003e \u003cp\u003e13.4.4 Parallel Algorithms 377\u003c\/p\u003e \u003cp\u003e13.4.5 Hysteresis Thresholding 377\u003c\/p\u003e \u003cp\u003e13.5 Connected Component Analysis (CCA) 377\u003c\/p\u003e \u003cp\u003e13.5.1 Basic Single-pass Algorithm 378\u003c\/p\u003e \u003cp\u003e13.5.2 Reducing Memory Requirements 379\u003c\/p\u003e \u003cp\u003e13.5.3 Eliminating End-of-row Overheads 379\u003c\/p\u003e \u003cp\u003e13.5.4 Parallel Algorithms 380\u003c\/p\u003e \u003cp\u003e13.5.5 Further Considerations and Optimisations 381\u003c\/p\u003e \u003cp\u003e13.6 Distance Transform 381\u003c\/p\u003e \u003cp\u003e13.6.1 Morphological Approaches 381\u003c\/p\u003e \u003cp\u003e13.6.2 Chamfer Distance 382\u003c\/p\u003e \u003cp\u003e13.6.3 Euclidean Distance 384\u003c\/p\u003e \u003cp\u003e13.6.4 Applications 386\u003c\/p\u003e \u003cp\u003e13.6.5 Geodesic Distance Transform 386\u003c\/p\u003e \u003cp\u003e13.7 Watershed Transform 387\u003c\/p\u003e \u003cp\u003e13.7.1 Flow Algorithms 388\u003c\/p\u003e \u003cp\u003e13.7.2 Immersion Algorithms 389\u003c\/p\u003e \u003cp\u003e13.8 Hough Transform 391\u003c\/p\u003e \u003cp\u003e13.8.1 Line Hough Transform 391\u003c\/p\u003e \u003cp\u003e13.8.2 Circle Hough Transform 394\u003c\/p\u003e \u003cp\u003e13.8.3 Generalised Hough Transform 395\u003c\/p\u003e \u003cp\u003e13.9 Summary 396\u003c\/p\u003e \u003cp\u003eReferences 396\u003c\/p\u003e \u003cp\u003e\u003cb\u003e14 Machine Learning 403\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e14.1 Training 403\u003c\/p\u003e \u003cp\u003e14.1.1 Loss and Cost Functions 404\u003c\/p\u003e \u003cp\u003e14.1.2 Model Optimisation 405\u003c\/p\u003e \u003cp\u003e14.1.3 Considerations 406\u003c\/p\u003e \u003cp\u003e14.2 Regression 409\u003c\/p\u003e \u003cp\u003e14.2.1 Linear Regression 409\u003c\/p\u003e \u003cp\u003e14.2.2 Nonlinear Regression 409\u003c\/p\u003e \u003cp\u003e14.2.3 Neural Networks 409\u003c\/p\u003e \u003cp\u003e14.3 Classification 411\u003c\/p\u003e \u003cp\u003e14.3.1 Decision Trees 411\u003c\/p\u003e \u003cp\u003e14.3.2 Random Forests 412\u003c\/p\u003e \u003cp\u003e14.3.3 Bayesian Classification 412\u003c\/p\u003e \u003cp\u003e14.3.4 Quadratic Discriminant Analysis 414\u003c\/p\u003e \u003cp\u003e14.3.5 Linear Discriminant Analysis 414\u003c\/p\u003e \u003cp\u003e14.3.6 Support Vector Machines 415\u003c\/p\u003e \u003cp\u003e14.3.7 Neural Networks 416\u003c\/p\u003e \u003cp\u003e14.3.8 Clustering 417\u003c\/p\u003e \u003cp\u003e14.4 Deep Learning 418\u003c\/p\u003e \u003cp\u003e14.4.1 Building Blocks 419\u003c\/p\u003e \u003cp\u003e14.4.2 Architectures and Applications 421\u003c\/p\u003e \u003cp\u003e14.4.3 Training 427\u003c\/p\u003e \u003cp\u003e14.4.4 Implementation Issues 428\u003c\/p\u003e \u003cp\u003e14.5 Summary 433\u003c\/p\u003e \u003cp\u003eReferences 433\u003c\/p\u003e \u003cp\u003e\u003cb\u003e15 Example Applications 441\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e15.1 Coloured Region Tracking 441\u003c\/p\u003e \u003cp\u003e15.2 Foveal Sensor 443\u003c\/p\u003e \u003cp\u003e15.2.1 Foveal Mapping 444\u003c\/p\u003e \u003cp\u003e15.2.2 Using the Sensor 447\u003c\/p\u003e \u003cp\u003e15.3 Real-time Produce Grading 448\u003c\/p\u003e \u003cp\u003e15.3.1 Software Algorithm 448\u003c\/p\u003e \u003cp\u003e15.3.2 Hardware Implementation 450\u003c\/p\u003e \u003cp\u003e15.4 Stereo Imaging 453\u003c\/p\u003e \u003cp\u003e15.4.1 Rectification 454\u003c\/p\u003e \u003cp\u003e15.4.2 Calculating the Depth 456\u003c\/p\u003e \u003cp\u003e15.4.3 Stereo Matching Design 457\u003c\/p\u003e \u003cp\u003e15.5 Face Detection 459\u003c\/p\u003e \u003cp\u003e15.5.1 Design 460\u003c\/p\u003e \u003cp\u003e15.6 Summary 461\u003c\/p\u003e \u003cp\u003eReferences 461\u003c\/p\u003e \u003cp\u003eIndex 465\u003c\/p\u003e  \u003cp\u003e\u003cb\u003eDonald G. Bailey, PhD,\u003c\/b\u003e is Professor of Imaging Systems in the Department of Mechanical and Electrical Engineering, Massey University, New Zealand. He is an internationally recognized expert on FPGA technology in image processing and has published widely on FPGAs and related subjects.   \u003c\/p\u003e\u003cp\u003e\u003cb\u003eBridge the gap between software and hardware with this foundational design reference\u003c\/b\u003e \u003c\/p\u003e\u003cp\u003eField-programmable gate arrays (FPGAs) are integrated circuits designed so that configuration can take place. Circuits of this kind play an integral role in processing images, with FPGAs increasingly embedded in digital cameras and other devices that produce visual data outputs for subsequent realization and compression. These uses of FPGAs require specific design processes designed to mediate smoothly between hardware and processing algorithm. \u003c\/p\u003e\u003cp\u003e\u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e provides a comprehensive overview of these processes and their applications in embedded image processing. Beginning with an overview of image processing and its core principles, this book discusses specific design and computation techniques, with a smooth progression from the foundations of the field to its advanced principles.  \u003c\/p\u003e\u003cp\u003eReaders of the second edition of \u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e will also find: \u003c\/p\u003e\u003cul\u003e\n\u003cli\u003eDetailed discussion of image processing techniques including point operations, histogram operations, linear transformations, and more\u003c\/li\u003e \u003cli\u003eNew chapters covering Deep Learning algorithms and Image and Video Coding\u003c\/li\u003e \u003cli\u003eExample applications throughout to ground principles and demonstrate techniques\u003c\/li\u003e\n\u003c\/ul\u003e \u003cp\u003e\u003ci\u003eDesign for Embedded Image Processing on FPGAs\u003c\/i\u003e is ideal for engineers and academics working in the field of Image Processing, as well as graduate students studying Embedded Systems Engineering, Image Processing, Digital Design, and related fields.\u003c\/p\u003e","brand":"Wiley","offers":[{"title":"Default Title","offer_id":47989044773093,"sku":"NP9781119819790","price":140.0,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1842\/7735\/files\/9781119819790.jpg?v=1761782564","url":"https:\/\/k12savings.com\/es\/products\/design-for-embedded-image-processing-on-fpgas-isbn-9781119819790","provider":"K12savings","version":"1.0","type":"link"}